A Hybrid Architecture Based on Quantized and Physics-Informed Neural Network for High-Fidelity SHC-PWM

Abstract

The practical implementation of advanced modulation strategies such as selective harmonic control pulsewidth modulation (SHC-PWM) is hindered by the prohibitive memory usage when lookup tables (LUTs) are implemented. Alternatively, neural networks have been proposed to emulate the LUT behavior, using less memory resources, but at the cost of an unavoidable precision loss and large computational execution time. This article introduces a hybrid hardware-software architecture on an field-programmable gate array system-on-chip (FPGA-SoC) platform that overcomes both challenges. The architecture features a large quantized neural network on the FPGA, trained with quantization-aware training to replicate the LUT, and complementary, it proposes a compact physics-informed refinement network running on the CPU to mitigate quantization error. Experimental validation of SHC-PWM using 1.1 million operating points and controlling seven harmonics demonstrates a memory compression ratio exceeding 200x compared to an LUT, a total inference latency as low as 73 & micro;s and a low absolute tracking error, with a maximum error below 0.002 per unit in dynamic tests. The proposed end-to-end methodology provides a complete and validated solution for deploying high-performance modulators on resource-constrained hardware.